Space Data Centers Database
Search and compare space data center projects and related orbital computing demonstrations, including developers, technical specifications, suppliers, agreements and milestones. Follow each commitment to its original announcement.
Catalog: 125 projects. 13 proposal / study · 52 development · 15 launched · 22 demonstrated · 6 operating · 14 historical · 3 uncertain. These are project classifications, not spacecraft counts or verified commercial capacity.
43 projects classified as launched, demonstrated or operating: 33 reviewed, 10 with review limits or awaiting review. Each project appears in one classification.
Linked view: APEX ARM space-processor research.
Columns & coverage · 1 empty columns hidden
1 of 1 projects have values for the selected fields. 1–2 of 2 configuration rows shown. Projects without values are hidden.
— No verified value recorded · N/A Not applicable · TBD Not yet defined · Conflict Unresolved. Configurations remain separate. Hardware ratings and plans do not establish measured performance. Open Details & sources for evidence and coverage notes.
| Project / configuration | Compute hardware | Memory / storage |
|---|---|---|
| APEX ARM space-processor researchCIRIS ground-controller prototypeARM Limited / NASA Jet Propulsion LaboratoryProject status: Completed research, no flight deployment established | Xilinx Zynq, 7-series FPGA logic and ARM Cortex-A9CIRIS ground-controller prototypeReported specificationofficial research result Duplicated processing stages, ECC memories and configuration-memory checksCIRIS ground-controller prototypeReported specificationofficial research result | ECC-protected controller memoriesCIRIS ground-controller prototypeReported specificationofficial research result |
Compute hardware: Xilinx Zynq, 7-series FPGA logic and ARM Cortex-A9 CIRIS ground-controller prototype. FPGA stages process spectroscopy data, with floating-point stages on Cortex-A9. This configuration is separate from the Cortex-R5 research subsystem. official research result. Included with these qualifications. Source observation: 2026-11-04. Supporting source ↗Compute hardware: Duplicated processing stages, ECC memories and configuration-memory checks CIRIS ground-controller prototype. The report explicitly says processor fault tolerance was not implemented at that CIRIS stage. Do not transfer the later R5 triplication to this Cortex-A9 prototype. official research result. Included with these qualifications. Source observation: 2026-11-04. Supporting source ↗Memory / storage: ECC-protected controller memories CIRIS ground-controller prototype. Protection architecture is identified. RAM capacity, storage media and storage capacity are not supplied. official research result. Included with these qualifications. Source observation: 2026-11-04. Supporting source ↗ | ||
| APEX ARM space-processor researchCortex-R5 research subsystemARM Limited / NASA Jet Propulsion LaboratoryProject status: Completed research, no flight deployment established | Three lockstepped ARM Cortex-R5 CPUs with shared SECDED-protected caches and memoriesCortex-R5 research subsystemReported specificationofficial research result | Shared caches and memories protected by SECDED codeCortex-R5 research subsystemReported specificationofficial research result |
Compute hardware: Three lockstepped ARM Cortex-R5 CPUs with shared SECDED-protected caches and memories Cortex-R5 research subsystem. Architecture-level research assessed using fault injection and commercial libraries. No selected spacecraft or flight qualification established. official research result. Included with these qualifications. Source observation: 2026-11-04. Supporting source ↗Memory / storage: Shared caches and memories protected by SECDED code Cortex-R5 research subsystem. Shared by the three lockstepped Cortex-R5 CPUs. No cache, RAM or storage capacity is specified. official research result. Included with these qualifications. Source observation: 2026-11-04. Supporting source ↗ | ||
Technical specifications retain the source’s original units and evidence status. Hardware counts, compute rates and power are not equivalent; launched hardware does not establish demonstrated performance. Supplier counts include suppliers and hosts only, reflect current filters and cover this directory, not the entire market. “No record” means no disclosure captured; it does not mean the work is unawarded. Latest developments use source dates, not routine review or collection dates.